The technology described herein relates to data processing systems and in particular to data processing systems comprising an accelerator that is operable to perform processing work for a host processor wherein the processing work is specified using one or more command stream(s) prepared by the host processor.
Many data processing systems include processing resources, such as a graphics processing unit (GPU) or a video processor (VPU), which may perform processing work for applications that are executing on a main processor (CPU) of the data processing system. For instance, many electronic devices, such as mobile phones or tablets, will include both a host processor (CPU) that executes an operating system, such as Android, capable of running various applications and one or more accelerators, such as a GPU, that provide hardware support for specific functions. In the case of a mobile phone or tablet, for example, the GPU may be used to generate the user interface that is displayed under the control of the operating system, and to compose the frame that is displayed on the display to the user.
In some modern data processing systems, the submission of processing work for the accelerator is controlled using one or more command stream(s), wherein the accelerator may be caused to perform processing work for applications executing on the host processor by the host processor providing a stream of commands (instructions) specifying the processing work to be performed by the accelerator. A command stream is therefore essentially a machine code program that can be executed by a special processor and the accelerator is thus provided with a command stream frontend including a dedicated processing unit, a ‘command stream execution unit’, for interpreting and implementing these command streams.
A command stream may, for example, contain commands (instructions) to set parameters for processing jobs, as well as commands (instructions) to execute the processing jobs, e.g. using the accelerator hardware units (processing core(s)). The command stream execution unit can then work its way through the command stream, executing, in turn, the commands (instructions) in the command stream and performing, or causing the accelerator hardware to perform, the operations indicated by the commands.
The command streams that are generated by the host processor can be written to appropriate command stream storage, e.g. in (main) system memory. The commands must therefore first be read from this command stream storage into the accelerator before they can be executed thereby.
Similarly, some of the commands (instructions) may relate to memory load operations, e.g., wherein data is to be fetched from system (main) memory into local storage such as a cache or register on the accelerator.
Such operations may be associated with a certain memory access latency, and this can reduce the command stream execution throughput.
The Applicants believe, therefore, that there remains scope for improved mechanisms for operating data processing systems wherein processing work for an accelerator is specified using one or more command stream(s).